A conventional technology is described hereinafter with reference to FIGS. 8 and 9.
To start with, a structure according to an example of the conventional technology is described. FIG. 8 is a pixel circuit diagram of an organic EL (electroluminescence) display using the conventional technology. Respective pixels 213 are provided with an organic EL device 201, and the organic EL device 201 has one end connected to a common electrode 208 and the other end connected to a power supply line 207 via a power supply switch 202, and a drive TFT (Thin-Film-Transistor) 203. A reset switch 204 interconnects the gate and the drain of the drive TFT 203. Further, the gate of the drive TFT 203 is coupled to a signal line 206 via a signal storage capacitor 205. The power supply switch 202 is controlled by a power supply control line (PWR) 211, and the reset switch 204 is controlled by a reset control line (RST) 210.
Next, an operation of the example of the conventional technology is described with reference to FIG. 9. FIG. 9 is an operation timing chart at a time of writing a signal voltage to the pixel according to the conventional technology, that is, at a data (DT) input time (DTIN), and a luminescence display time (ILMI). In this case, since a pMOS is used for the power supply switch 202, and the reset switch 204, respectively, as shown in FIG. 8, lower parts of respective waveforms, shown in FIG. 9, correspond to ON of the respective switches, and upper parts thereof correspond to OFF.
With the pixel selected for writing, at the time (DTIN) of writing the signal voltage in the first half of one frame period (1FRM), the power supply switch 202 is first turned ON by the power supply control line (PWR) 211, and subsequently, the reset switch 204 is turned ON by the reset control line (RST) 210. At this point in time, current flows from the power supply line 207 to the organic EL device 201 via the drive TFT 203 connected to a diode, and the power supply switch 202.
Next, when the power supply switch 202 is turned OFF by the power supply control line (PWR) 211, the drive TFT 203 is turned OFF at a time when a voltage at a drain end of the drive TFT 203 turns to a threshold voltage Vth. At this point in time, a predetermined signal voltage (data signal DT) has already been applied to the signal line 206, and a difference between the signal voltage and the threshold voltage Vth is inputted to the signal storage capacitor 205.
Subsequently, the reset switch 204 is turned OFF by the reset control line (RST) 210, whereupon the voltage of the data signal DT is stored in the signal storage capacitor 205, thereby completing writing of the signal voltage to the pixel.
At the luminescence display time (ILMI) corresponding to the latter half of one frame period (1FRM), a scanning signal SS (predetermined triangular wave signal) is inputted to all the pixels via the signal line 206, and the power supply switch 202 is turned ON by the power supply control line (PWR) 211. At this point in time, if the triangular wave signal applied to the signal line 206 is equivalent to the pre-written signal voltage, the threshold voltage Vth is inputted to the gate of the drive TFT 203, so that a luminescence period of the organic EL device 201 is determined according to the pre-written signal voltage. As a result, the organic EL device 201 undergoes luminescence for luminescence time corresponding to the signal voltage for an image, so that a viewer can recognize the image with gradation.
Incidentally, as the data signal DT or the scanning signal SS is inputted to the signal line 206 depending on respective predetermined periods within the one frame period, these signals are denoted by DT/SS in the figure.
The conventional example described is disclosed in detail in, for example, JP-A No. 122301/2003, and so forth.
A pixel circuit of an image display system using organic EL devices, and a method of driving the same are disclosed in SID 98 Digest of Technical Papers, 1998, pp. 11-14.